Detailed explanation of multilayer PCB laminate structure (4)

4 Internal electrical layer design


A very important advantage of multi-layer boards over ordinary double-layer boards and single-layer boards is that signal lines and power can be distributed on different board layers, improving the signal isolation and anti-interference performance. The internal electrical layer is a copper film layer. The copper film is divided into several isolated areas. The copper film in each area is connected to a specific power supply or ground through a via, thereby simplifying the routing of power and ground networks. At the same time, the internal resistance of the power supply can be effectively reduced.


4.1 Related settings for internal electrical layer design


The internal electrical layer is usually a whole piece of copper film. When the pad with the same network name as the copper film passes through the internal electrical layer, the system will automatically connect it to the copper film. The connection form of the pads / vias to the internal electrical layer and the safe spacing of the copper film and other pads not belonging to the network can be set in the Power Plane Clearance option. Select the [Design] / [Rules…] command and click the Manufacturing option. The Power Plane Clearance and Power Plane Connect Style options are related to the internal electrical layer, and their contents are described below.


(1) Power Plane Clearance


This rule is used to set the safe distance of the internal electrical layer, which mainly refers to the safe distance of the pads and vias that have no network connection to the internal electrical layer and the internal electrical layer. At the time of manufacture, the copper film surrounding the pads that have no network connection to the internal electrical layer will be corroded when passing through the internal electrical layer. The size of the corroded ring is the value set in the constraint.


(2) Power Plane Connect Style


This rule is used to set the form of pads and internal electrical layers. Mainly refers to the form when pads and vias connected to the internal electrical layer are connected to the internal electrical layer.


Click the Properties button to bring up its rule settings dialog. The left side of the dialog box is the applicable scope of the rule. You can choose the connection method in the Rule Attributes drop-down list on the right side: Relief Connect, Direct Connect, and No connect. Direct Connect means direct connection. When the pad passes through the internal electrical layer, the surrounding copper film is not corroded, and the pad is directly connected to the internal electrical layer copper film. Disks will not be connected to the internal electrical layer; designers generally use the system's default Relief Connect connection.


This pad connection form is connected to the internal electrical layer through the conductor extension and insulation gap. The width of the conductor outlet is set in the Conductor Width option; the number of conductor outlets is selected in the Conductor option, which can be 2 or 4; The width of the conductor extension is set in the setting; the width of the insulation gap is set in the Air-Gap option.


4.2 Internal electrical layer segmentation method


In the previous sections of this chapter, the selection of the multilayer structure of multilayer boards, the establishment of internal electrical layers, and related settings have been introduced. In this section, the method and steps of dividing the internal electrical layers of multilayer boards will be mainly introduced for readers' reference .


(1) Before splitting the internal electrical layer, you first need to define an internal electrical layer. This has already been introduced in the previous chapters and will not be repeated here. Select the [Design] / [Split Planes…] command to pop up the inner layer splitting dialog box. The current split planes column in this dialog refers to the area where the internal electrical layer has been split. In this example, the internal electrical layer has not been split, so the Current split planes column is blank. The Add, Edit, and Delete buttons under the Current split planes column are used to add new power zones, edit the selected network, and delete the selected network, respectively. The Show Selected Split Plane View option under the button is used to set whether to display the schematic diagram of the currently selected internal electrical layer split area. If this option is selected, a thumbnail of the network area divided by the area in the electrical layer will be displayed in the box below it, and the pins, pads or wires with the same name as the electrical layer network will be higher in the thumbnail Highlight, if not selected, it will not be highlighted. Show Net For option, select this option. If the internal electrical layer has been specified with a network when the internal electrical layer is defined, the boxes and pins with the same name as the network are displayed in the box above this option.


(2) Click the Add button to pop up the internal electrical layer division setting dialog box.

In the dialog box, Track Width is used to set the line width when drawing the border, and it is also the insulation distance between different network areas on the same internal electrical layer. Therefore, Track Width is usually set to be relatively large. Readers are advised to enter units when entering values. If you enter only numbers and no units here, the system will default to the units in the current PCB editor.


The Layer option is used to set the internal electrical layer for the specified division. Here you can select the internal electrical layer for Power and GND. There are multiple voltage levels in this example, so the internal electrical layer of Power needs to be divided to provide different levels of voltage for components.


The Connect to Net option is used to specify the network to which the divided area is connected. The inner electrical layer is usually used for the layout of the power and ground networks, but you can see in the Connect to Net drop-down list that you can connect the entire network of the inner layer to the signal network for signal transmission, but the general designer does not handle this. . The signal voltage and current required by the signal are weak, and the wires are required to be small, while the power supply current is large, and smaller equivalent internal resistance is required. Therefore, the general signal is routed on the signal layer, and the internal electrical layer is dedicated to the power and ground network connections.


(3) Click the OK button in the internal electrical layer division setting dialog box to enter the network area border drawing state.


When drawing the border of the internal electrical layer, the user generally hides the information of other layers and only displays the currently edited internal electrical layer to facilitate the drawing of the border. Select [Tools] / [Preferences ...] command. Select the Display option and select the Single Layer Mode check box. In this way, all layers except the current working layer Power are hidden.


When dividing the internal electrical layer, because the divided area includes all the pins and pads of the network, users usually need to know the distribution of pins and pads with the same name as the power network in order to perform the division. Select the VCC network in the Browse PCB tool on the left and click the Select button to highlight the network.


After the VCC network is selected and selected, the pads and pins labeled VCC of the network are compared with the pads and pins labeled of other networks.


After selecting these network pads with the same name, you can include these pads in the divided area when drawing the boundary. At this time, these power supply networks can be connected to the internal electrical layer directly through the pads instead of being connected through the signal layer.


(4) Draw the internal electrical layer segmentation area.


Select the [Design] / [Split Planes…] command to pop up the internal electrical layer division dialog box, and click the Add button to pop up the internal electrical layer division setting dialog box. First select the 12V network and click the OK button. The cursor will change into a cross shape. At this time, the division work can be started in the internal electrical layer.


When drawing the border line of the border, you can press "Shift + Spacebar" to change the corner shape of the trace, or you can press the Tab key to change the properties of the internal electrical layer. After drawing a closed area (the starting point and the end point coincide), the system automatically pops up the internal electrical layer segmentation dialog box. In this dialog box, you can see a region that has been divided and displayed in the PCB editing interface.


After adding the internal electrical layer, zoom in on a 12V pad, and you can see that the pad is not connected to the wire, but a "+" sign appears on the pad, indicating that the pad is already connected to the internal electrical layer connection.


Switch the current working layer to the Power layer, and you can see the connection status of this pad on the internal electrical layer. Since the internal electrical layer is usually a whole piece of copper film, the part shown around the pad will be corroded during the manufacturing process. It can be seen that GND and the internal electrical layer are insulated.


After the 12V area is added to the internal power layer, other networks can be added according to actual needs, that is, the entire Power internal power layer is divided into several different isolated areas, and each area is connected to a different power network.


After the internal electrical layer is divided, you can edit and delete the placed internal electrical layer network in the dialog box. Click the Edit button to bring up the inner electrical layer properties dialog box. In this dialog box, you can modify the boundary line width, the inner electrical layer level, and the connected network, but you cannot modify the shape of the boundary. If you are not satisfied with the direction and shape of the boundary, you can only click the Delete button to redraw the boundary; or select the [Edit] / [Move] / [Split Plane Vertices] command to modify the internal electrical layer boundary lines. Move the handles on the border to change the shape of the border. After finishing, click the Yes button in the pop-up confirmation dialog box to complete the redraw.


4.3 Basic Principles of Internal Electrical Layer Segmentation


After the division of the internal electrical layer is completed, this section introduces several issues that need attention in the division of the internal electrical layer.


(1) When drawing the boundaries of different network areas in the same internal electrical layer, the boundary lines of these areas can overlap each other, which is also a commonly used method. Because in the manufacturing process of the PCB, the boundary is the part of the copper film that needs to be corroded, that is, an insulation gap separates the copper films of different network labels. In this way, the copper film area of the internal electrical layer can be fully utilized without causing electrical isolation conflicts.


(2) When drawing the boundary, try not to let the boundary line pass through the pads of the area to be connected. Because the boundary is the part of the copper film that needs to be corroded during the manufacturing process of the PCB, there may be problems with the connection between the pad and the internal electrical layer due to the manufacturing process. Therefore, try to ensure that the border does not pass through the pads with the same network name when designing the PCB.


(3) When drawing the boundary of the internal electrical layer, if it is impossible to include all the pads of the same network due to objective reasons, then these pads can also be connected by means of signal layer routing. However, in practical applications of multilayer boards, this situation should be avoided as much as possible. Because if these pads are connected to the internal electrical layer by signal layer routing, it is equivalent to connecting a larger resistance (signal layer wiring resistance) and a smaller resistance (internal electrical layer copper film resistance) in series. The important advantage of using a multilayer board is that the large-area copper film is used to connect the power source and the ground to effectively reduce the line impedance, reduce the ground potential shift caused by the PCB ground resistance, and improve the anti-interference performance. Therefore, in actual design, it should be avoided to connect the power network through wires.


(4) The ground network and the power supply network are distributed in different internal electrical layers to achieve better electrical isolation and anti-interference effects.


(5) For SMD components, pads or vias can be placed at the pins to connect to the internal electrical layer, or a short wire can be drawn from the pins (the leads should be as short as possible to reduce Line impedance), and place pads and vias at the ends of the wires to connect.


(6) About the placement of decoupling capacitors. As mentioned earlier, a 0.01μF decoupling capacitor should be placed near the chip. For power-supply chips, a 10F or larger filter capacitor should also be placed to filter out high-frequency interference and ripple in the circuit and use it up. Possibly short wires are connected to the pins of the chip, and then to the internal electrical layer through the pads.


(7) If you do not need to divide the internal electrical layer, then you can directly select to connect to the network in the properties dialog box of the internal electrical layer, and the internal electrical layer division tool is no longer needed.