The via design of the PCB should not be underestimated, especially for high speed PCB.
At present, the design of high-speed PCB is widely used in communication, computer, graphic image processing and other fields. All high-tech value-added electronic products are designed with low power consumption, low electromagnetic radiation, high reliability, miniaturization and Light weight. In order to achieve the above goals, via design is an important factor in high-speed PCB design. It consists of a hole, a pad area around the hole, and a POWER layer isolation area, which are usually classified into blind holes, buried holes, and through holes. Some considerations in the design of high-speed PCB vias are summarized in the PCB design process by analyzing the parasitic capacitance and parasitic inductance of the vias.
Via is an important factor in multilayer PCB design. One channel is mainly composed of three parts, one is a hole; the other is a pad area around the hole; the third is a POWER layer isolation area. The via process is a method of chemically depositing a metal layer on the cylindrical surface of the via hole of the via hole to connect the copper foil connected in the intermediate layer, and the upper and lower sides of the via hole are made into a common pad. The shape can be connected directly to the line on the upper and lower sides, or not. Through holes can be used to electrically connect, secure or position the device.
2、Vias are usually divided into three categories: blind vias, buried vias, and vias.
(1) The blind holes on the top and bottom surfaces of the printed circuit board have a certain depth for connecting the surface lines and the underlying inner lines. The depth and pore size of the pores usually do not exceed a certain ratio.
(2) Buried hole refers to a connection hole located in the inner layer of the printed circuit board, which does not extend to the surface of the circuit board.Both the blind via and the buried via are located in the inner layer of the board and are completed by a via formation process prior to lamination, and a plurality of inner layers may be overlapped during the formation of the via.
(3) Through-holes, which pass through the entire board, can be used to implement internal interconnections or as mounting holes for components. Through-holes are commonly used in printed circuit boards because vias are easier to implement and less expensive in the process.
3、 The parasitic capacitance of the via
The via hole itself has a parasitic capacitance to the ground. If the via hole diameter of the via hole on the ground layer is D2, the diameter of the via hole pad is D1, the thickness of the PCB is T, and the dielectric constant Of the board substrate is ε, then The parasitic capacitance of the via is approximately the same as:C =1.41εTD1/(D2-D1)
The main effect of the parasitic capacitance of the via on the circuit is to extend the rise time of the signal and reduce the speed of the circuit. The smaller the capacitance, the smaller the effect.
4、The parasitic inductance of the via
In the case of high-speed digital circuits, the parasitic inductance of the via hole is often more harmful than the parasitic capacitance inductance of the vias weakens the bypass capacitor and reduces the filtering effectiveness If the entire power system. If L is the inductance of the via, h is the length of the via, and d is the diameter of the center hole. The parasitic inductance of the via is approximately: L=5.08h[ln(4h /d)+1]
It can be seen from the equation that the diameter of the via has less influence on the inductance, and the greatest influence on the inductance is the length of the via.
5、Non-through hole technology
Non-through vias include blind vias and buried vias. In non-through-hole technology, the application of blind vias and buried vias can greatly reduce the size and quality of PCB, reduce the number of layers, improve electromagnetic compatibility, increase the characteristics of electronic products, reduce costs, and make design work easier and faster. . Through holes have many problems in conventional PCB design and processing. First of all, they occupy a lot of effective space. Second, a large number of vias are also a significant barrier to the inner layers of multilayer PCB. These vias occupy the space required for the traces and they pass densely through the power and ground. The surface of the wire layer also destroys the impedance characteristics of the power ground plane and disables the power ground plane. The traditional mechanical drilling will be 20 times the workload of non-through holes.
In the PCB design, although the size of the pads and vias has been gradually reduced, if the thickness of the layer is not scaled down, the aspect ratio of the vias will increase, and an increase in the aspect ratio of the vias will reduce reliability. With advanced laser drilling techniques and advances in plasma dry etching, small through holes and small buried holes can be used. If these non-through holes have a diameter of 0.3 mm, the parasitic parameters are about 1/10 of the original conventional holes, which improves the reliability of the PCB.
Due to the non-through-hole technology, there are few through-holes on the PCB, providing more space for routing. The remaining space can be used for large area shielding to improve EMI / RFI performance. At the same time, more space is available for the inner layer to partially shield the equipment and critical network cables for optimum electrical performance. Non-vias make it easier to fan out device pins, making high-density pin devices such as BGA packages easy to route, shorten lead lengths, and meet high-speed circuit timing requirements.
6、 The choice of vias in ordinary PCB
In general-purpose PCB designs, the parasitic capacitance and parasitic inductance of the vias have little effect on the PCB design. For 1-4 layer PCB designs, 0.36mm / 0.61mm / 1.02mm (hole/pad/POWER isolation area) is typically used. ) The via is better. Some special signal lines (such as power lines, ground lines, clock lines, etc.) can use 0.41mm / 0.81mm / 1.32mm vias, or you can use other sizes of vias as needed.
7、Through high speed PCB design
Through the above analysis of the parasitic characteristics of vias, we can see that in high-speed PCB design, seemingly simple vias often have a large negative impact on the design of the circuit. In order to reduce the adverse effects of via parasitic phenomenon, you can do as much as possible in your design:
(1) Select a reasonable through hole size. For multi-layer general-purpose PCB designs, vias of 0.25mm / 0.51mm / 0.91mm (hole/pad/POWER isolation) are preferred; for some high-density PCB, 0.20mm / 0.46mm / 0.86mm can also be used. And also try not to use vias; for vias with power or ground, consider using larger sizes to reduce impedance;
(2) The larger the isolation area of POWER, the better the density of via holes on the PCB, generally D1 = D2 0.41;
(3) The signal traces on the PCB should not be changed as much as possible, that is, the through holes should be minimized;
(4) Using a thinner PCB helps to reduce the two parasitic parameters of the via;
(5) The power and ground pins should be close to the vias. The shorter the leads between the vias and the pins, the better, as they cause an increase in inductance. At the same time, the power and ground leads should be as thick as possible to reduce the impedance;
(6) Place some ground vias near the through holes of the signal conversion layer to provide short-distance circulation for the signals.
Of course, specific analysis of specific issues is required at design time. Considering cost and signal quality, in high-speed PCB design, designers always want the vias to be as small as possible, leaving more wiring space on the board. In addition, the smaller the via hole, the smaller its own parasitic capacitance, and the better the high speed circuit. In high-density PCB designs, the use of non-vias and reduced via size also results in increased cost, and the size of the vias cannot be reduced indefinitely. It is drilled and wired by the PCB manufacturer.